1. Field of the Invention
The present invention relates to the testing of semiconductor devices having multiple input/output pads, and particularly to the testing on individual input/output pads of semiconductor devices based on the probing by the tester on one pad out of a certain number of pads.
2. Description of the Prior Art
As a recent advanced semiconductor device fabrication technique, a number of semiconductor devices are packaged in a plastic case to complete a high-performance LSI. High-performance is represented by SIP (System In Package) in which LSIs of different kinds such as the system or microprocessor and memory devices are packaged in a case, and MCP (Multi-Chip Package) in which LSIs of a same kind such as memory devices are packaged in a case.
Individual semiconductor devices in a SIP or MCP have some of their input/output pads led out of the case to become input/output pins of the SIP or MCP and have other input/output pads solely interconnected among the devices without being led out of the case. On this account, for testing the operational characteristics of these devices, it is necessary to test the devices while they are on the wafer or before they are packaged in the case of SIP or MCP.
The on-wafer test is conducted by bringing the probes of LSI tester in contact with pads of a device (will be called “probing test”). The probing test is generally conducted for a number of devices simultaneously within the allowance in terms of the number of test signal drivers and response signal comparators in the LSI tester in order to minimize the testing time.
Application systems accomplished by SIPs and MCPs are becoming sophisticated and complex, and these SIPs and MCPs are required to have a large data bus width and thus a large number of input/output pads. Specifically, for example, memory devices which used to have a 16-bit or 32-bit data bus are now required to have a 64-bit or 128-bit data bus, i.e., 64 or 128 input/output pads.
The probing test for a device having such a large number of input/output pads is conducted basically by bringing the tester probes in contact with all pads which align closely on the device. Consequently, a large number of signal drivers and comparators of the tester need to be assigned to one device, resulting in a limited number of devices which can be tested at once.
As a scheme of performing the probing test for devices having a large number of input/output pads while dealing with an adequate number of devices at once, there has been devised a scheme of input/output pad number compressive test as described in Japanese Laid-open Patent Publication No. 10-3800 and Japanese Laid-open Patent Publication No. 11-16391. In the pad number compressive test, each test probe is used for signal transaction with one input/output pad (probe pad) which represents a certain number of pads, instead of signal transaction with all pads. Other pads (off-probe pads) have internal signal routes which are common to the probe pad so that all internal circuits corresponding to the certain number of input/output pads are supplied with a common signal.
Output signals from the internal circuit to all pads, with their logic levels being settled, are conducted to the probe pad as a verification result so that the AC test which verifies the functional characteristics of the device are performed for the certain number of input/output pads. Consequently, the number of test probes to be brought in contact with input/output pads necessary for the probing test of one device is reduced to the reciprocal of the certain number and an adequate number of devices can be treated for simultaneous measurement.
However, the conventional fundamental probing test based on the provision of probes to be brought in contact with all pads will encounter the difficulty of aligning the probes at a microstructured pad interval. Accordingly, this scheme is problematic in that the device can possibly have its pad interval restricted by the limit of probe alignment interval.
Another problem is that even if the tester probes can be brought in contact with all pads of a wide-bus device, a large number of drivers and comparators for the signal transaction with the device through the probes become necessary, resulting in a smaller number of devices which can be treated for the simultaneous probing test and thus an increased testing time and cost due to the degraded efficiency of test.
Still another problem of the conventional probing test based on the pad number compressive test scheme is that a probe is brought in contact with only one input/output pad which represents a certain number of pads, causing the rest of the pads having no direct signal transaction to be excluded from the test for measuring the input/output leak currents (leak current test) and detecting the line breakage (open-line test).